(**********************************************************************) (* *) (* Function: OC - Output Compare *) (* *) (* Creation Date: Pre 89 From: NEW *) (* *) (* Author: Motorola *) (* *) (* Description: *) (* ------------ *) (* i) Single shot output. *) (* ii) Continuous square wave afer receiving link. *) (* iii) Period of square wave a ratio of a period measured elsewhere. *) (* iv) Read TCR times and supply to CPU. *) (* *) (* Updates: By: Modification: *) (* -------- --- ------------- *) (* 28/Feb/92 JW Cleaned up for inclusion in Library *) (* 11/Apr/93 JL Converted to new syntax & changed unused link *) (* states to End_of_Link *) (* *) (*--------------------------------------------------------------------*) (* Standard Exits Used:- End_Of_Phase: Y End_Of_Link: N *) (* *) (* External Files %included: NONE. *) (* *) (* CODE SIZE excluding standard exits = 39 LONG WORDS *) (*--------------------------------------------------------------------*) (* *) (* *) (********** This Revision: 2.0 *********) (* *) (* Functionally identical to 68332 TPU ROM of masks D33F, D87M, 2D87M *) (* *) (********** LAST MODIFIED: 10/Apr/93 BY: Jeff Loeliger ********) (* *) (**********************************************************************) (***************************************************************************) (*Motorola reserves the right to make changes without further notice to any*) (*product herein. Motorola makes no warranty, representation or guarantee *) (*regarding the suitability of its products for any particular purpose, nor*) (*does Motorola assume any liability arising out of the application or use *) (*of any product or circuit, and specifically disclaims any and all *) (*liability, including without limitation consequential or incidental *) (*damages. "Typical" parameters can and do vary in different applications. *) (*All operating parameters, including "Typical",must be validated for each *) (*customer application by customer's technical experts. Motorola does not *) (*convey any license under its patent rights nor the rights of others. *) (*Motorola products are not designed, intended, or authorized for use as *) (*components in systems intended for surgical implant into the body, or *) (*other applications intended to support or sustain life, or for any other *) (*application in which the failure of the Motorola product could create a *) (*situation where injury or death may occur. Should Buyer purchase or use *) (*Motorola products for any such unintended or unauthorized application, *) (*Buyer, shall indemnify and hold Motorola and its officers, employees, *) (*subsidiaries, affiliates, and distributors harmless against all claims, *) (*costs, damages, and expenses, and reasonable attorney fees arising out *) (*of, directly or indirectly, any claim of personal injury or death *) (*associated with such unintended or unauthorized use, even if such claim *) (*alleges that Motorola was negligent regarding the design or manufacture *) (*of the part. *) (*Motorola and the Motorola logo are registered trademarks of Motorola Inc.*) (*Motorola is an Equal Opportunity/Affirmative Action Employer. *) (*Copyright Motorola Inc. 1993 *) (***************************************************************************) (* Parameters *) %macro OM_CHANNEL_CONTROL 'prm0'. %macro OFFSET 'prm1'. %macro REF_ADDR1 'prm2'. %macro RATIO 'prm2'. %macro REF_ADDR2 'prm3'. %macro REF_ADDR3 'prm3'. %macro REF_TIME 'prm4'. %macro ACTUAL_MAT_TIME 'prm5'. (**********************************************************************) (* *) (* STATE : INIT *) (* *) (* PRELOAD PARAMETER : OM_CHANNEL_CONTROL *) (* *) (* ENTER WHEN : HSR = 11 *) (* *) (* ACTION : Force initial pin level as specified by OM_CHANNEL_CONTROL*) (* Enable service requests, *) (* Channel flag1 = 1. *) (* *) (* ERT -> ACTUAL_MAT_TIME. *) (* Negate service request sources, mrl, tdl, lsr, *) (* Channel flag0 = 1, *) (* Generate phase interrupt. *) (* *) (* Generate phase interrupt. *) (* *) (**********************************************************************) %entry ram p <- @OM_CHANNEL_CONTROL; start_address *; name = init_om; cond hsr1 = 1, hsr0 = 1. init_om : chan config := p, enable_mtsr; chan set flag1. om_occurrence : au diob := ert + 0; ram diob -> @ACTUAL_MAT_TIME. (* save ert of actual match time *) chan neg_mrl, neg_tdl, neg_lsl; chan set flag0; (* offset_cal mode *) chan cir; end. exit_om : chan cir; end. (**********************************************************************) (* *) (* STATE : HOST_MATCH *) (* *) (* PRELOAD PARAMETER : OM_CHANNEL_CONTROL *) (* *) (* ENTER WHEN : HSR = 01 *) (* *) (* ACTION: TCR1 -> ram word address EC. *) (* TCR2 -> ram word address EE. *) (* if HSB1 = 1 *) (* end. *) (* else *) (* Force initial pin level as specified by CHANNEL_CTL, *) (* Enable service requests, *) (* Specify pin level upon match occurrence. *) (* Channel flag0 = 0, flag1 = 1. *) (* Ref. time is updated contents pointed to by REF_ADDR1.*) (* Generate match at ref. time + OFFSET. *) (* REF_TIME is updated with ref. time + OFFSET. *) (* *) (**********************************************************************) %entry ram p <- @OM_CHANNEL_CONTROL; start_address *; disable_match; name = host_match; cond hsr1 = 0,hsr0 = 1. au diob := TCR1 + 0; ram diob -> $EC. (* READ TCR1 *) au diob := TCR2 + 0; ram diob -> $EE. (* READ TCR2 *) if hsq1 = 1 then goto exit_om, flush. chan config := p, enable_mtsr; chan clear flag0. ram p <- @OFFSET; chan clear flag1. ram diob <- @REF_ADDR1. (* REF_ADDR1 pointer to reference value *) ram diob <- by_diob. au ert := diob + p; (* MER = reference time + OFFSET *) chan write_MER, neg_mrl. au p := ert + 0; ram p -> @REF_TIME; end. (* update REF_TIME *) (**********************************************************************) (* *) (* STATE : REF_TIME_MATCH *) (* *) (* PRELOAD PARAMETER : *) (* *) (* ENTER WHEN : MRL = 1 AND flag0 = 0. *) (* *) (* ACTION : Negate MRL. *) (* Generate Phase Interrupt. *) (* *) (**********************************************************************) %entry ram p <- @OM_CHANNEL_CONTROL; start_address om_occurrence; name = ref_time_match; cond hsr1 = 0,hsr0 = 0,m/tsr = 1,lsr = 0,flag0 = 0. (**********************************************************************) (* *) (* STATE : OFFSET_CAL *) (* *) (* PRELOAD PARAMETER : Don't care *) (* *) (* ENTER WHEN : (LSL=1 and flag0=1 and MRL=X and pin=X) *) (* *) (* *) (* ACTION: Setup first match with contents pointed to by REF_ADDR1. *) (* Affect channel with OM_CHANNEL_CONTROL *) (* If first link after initialization or (REF_ADDR2) <= 0 *) (* Setup first match with contents point to by REF_ADDR3.*) (* Update REF_TIME with contents pointed to by REF_ADDR1. *) (* Update OFFSET with contents pointed to by REF_ADDR2 *) (* scaled with RATIO. *) (* Negate lsr. *) (* *) (**********************************************************************) (* correction 7/9/89 *) %entry ram diob <- @REF_ADDR1; start_address *; disable_match; name = offset_cal; cond hsr1 = 0,hsr0 = 0,lsr = 1,flag0 = 1. (* end correction 7/9/89 *) au p := diob + 0; (* p = REF_ADDR1 *) ram diob <- by_diob. (* diob = content point to REF_ADDR1*) au sr := p_high; (* put RATIO in shift register *) ram p <- @OM_CHANNEL_CONTROL. (* p = REF_ADDR3 *) if flag1 = 0 then goto not_first_link; chan clear flag1; chan config := p. ram p <- @REF_ADDR2. ram diob <- @REF_ADDR3. (* diob = REF_ADDR3 *) ram diob <- by_diob. (* diob = content point to REF_ADDR3*) au ert := diob + 0; chan write_MER; (* configure for first match out of reset *) chan neg_mrl. (* added command to neg mrl *) not_first_link : ram diob -> @REF_TIME. (* reference time -> REF_TIME *) au diob := p_high. (* diob = REF_ADDR2 *) ram p <- by_diob; (* p = content pointed to REF_ADDR2 *) au diob := 0. (* clear diob *) au dec := #07. (* setup for 1/256 scaling *) au diob :=>> diob + p, shift; (* start scaling *) repeat. ram diob -> @OFFSET; (* store scaled value to OFFSET *) chan neg_lsl. (**********************************************************************) (* *) (* STATE : OFFSET_MATCH *) (* *) (* PRELOAD PARAMETER : OFFSET *) (* *) (* ENTER WHEN : MRL=1 and flag0=1. *) (* *) (* ACTION : Update REF_TIME with old REF_TIME + OFFSET. *) (* If OFFSET <= 0. (negative values = > 15 bits) *) (* force pin level specified by OM_CHANNEL_CONTROL. *) (* Channel flag0 = 1, *) (* Negate mrl, tdl, lsr, *) (* Generate phase interrupt. *) (* else *) (* Configure channel for next match time. *) (* Negate mrl and generate phase interrupt. *) (* *) (**********************************************************************) %entry ram diob <- @OFFSET; start_address *; name = offset_match; cond hsr1 = 0,hsr0 = 0,m/tsr = 1,lsr = 0,flag0 = 1. au a := diob - 1, ccl; (* check for OFFSET = 0 *) ram p <- @REF_TIME. if less_than = FALSE then goto ref_not_zero, (* ref.value <= 0 ?*) flush; chan PAC := toggle. ram p <- @OM_CHANNEL_CONTROL; goto init_om, flush. ref_not_zero : au p := p + diob; ram p -> @REF_TIME. (* update with new reference time *) au ert := p + 0; chan write_MER, neg_mrl; chan clear flag1; chan cir; end. (**********************************************************************) (* UNUSED ENTRIES - execute an end. *) (**********************************************************************) %entry ram p<-prm0; start_address End_of_Link; name = om_undef; cond hsr1 = 0,hsr0 = 0,lsr = 1,flag0 = 0. %entry ram p<-prm0; start_address End_of_phase; name = om_undef; cond hsr1 = 1,hsr0 = 0.