(**********************************************************************) (* *) (* Function: PPWA *) (* Period & Pulse Width Accumulation. *) (* *) (* Creation Date: Pre 89 From: NEW *) (* *) (* Author: Motorola *) (* *) (* Description: *) (* ------------ *) (* Accumulate period/high-time over a specified number of periods. *) (* *) (* SEQ0 : Set for 16-bit and link mode *) (* *) (* SEQ1 : Set for High-Time, clear for Period Mode *) (* *) (* FLAG0 : Used only for Mode 2 & 3 *) (* Set on Init and when Falling edge is serviced *) (* Except when Carryout is generated from ACCUM *) (* Cleared in High_Time_Begin *) (* *) (* FLAG1 : Set when link is generated as a result of overflow *) (* No more links will be generated *) (* *) (* *) (* Updates: By: Modification: *) (* -------- --- ------------- *) (* 19/Apr/93 JL Cleaned up for inclusion in Library *) (* *) (* *) (*--------------------------------------------------------------------*) (* Standard Exits Used:- End_Of_Phase: Y End_Of_Link: N *) (* *) (* External Files %included: LINKCHAN. *) (* *) (* CODE SIZE excluding standard exits = 54 LONG WORDS *) (*--------------------------------------------------------------------*) (* *) (* *) (********** This Revision: 2.0 *********) (* *) (********** LAST MODIFIED: 19/Apr/92 BY: Jeff Loeliger ********) (* *) (**********************************************************************) (***************************************************************************) (*Motorola reserves the right to make changes without further notice to any*) (*product herein. Motorola makes no warranty, representation or guarantee *) (*regarding the suitability of its products for any particular purpose, nor*) (*does Motorola assume any liability arising out of the application or use *) (*of any product or circuit, and specifically disclaims any and all *) (*liability, including without limitation consequential or incidental *) (*damages. "Typical" parameters can and do vary in different applications. *) (*All operating parameters, including "Typical",must be validated for each *) (*customer application by customer's technical experts. Motorola does not *) (*convey any license under its patent rights nor the rights of others. *) (*Motorola products are not designed, intended, or authorized for use as *) (*components in systems intended for surgical implant into the body, or *) (*other applications intended to support or sustain life, or for any other *) (*application in which the failure of the Motorola product could create a *) (*situation where injury or death may occur. Should Buyer purchase or use *) (*Motorola products for any such unintended or unauthorized application, *) (*Buyer, shall indemnify and hold Motorola and its officers, employees, *) (*subsidiaries, affiliates, and distributors harmless against all claims, *) (*costs, damages, and expenses, and reasonable attorney fees arising out *) (*of, directly or indirectly, any claim of personal injury or death *) (*associated with such unintended or unauthorized use, even if such claim *) (*alleges that Motorola was negligent regarding the design or manufacture *) (*of the part. *) (*Motorola and the Motorola logo are registered trademarks of Motorola Inc.*) (*Motorola is an Equal Opportunity/Affirmative Action Employer. *) (*Copyright Motorola Inc. 1993 *) (***************************************************************************) (* Parameters *) %macro STRT_LNK_CH_PHM 'prm0'. %macro CH_CONTROL_PHM 'prm0'. %macro TRANS_COUNT_PHM 'prm1'. %macro MAX_COUNT_PHM 'prm1'. %macro LAST_TIME 'prm2'. %macro ACCUM 'prm3'. (******CHANGE ORDER *****) %macro PHM2 'prm4'. %macro PHM1 'prm5'. (* Include routine to link to a block of channels *) %include 'linkchan.uc'. (**********************************************************************) (* *) (* STATE : Init *) (* *) (* PRELOAD PARAMETER : CHANNEL_CONTROL *) (* *) (* ENTER WHEN : issued host service request 10 *) (* *) (* ACTION : configure channel latches by p register *) (**********************************************************************) %entry ram p <- @CH_CONTROL_PHM; start_address *; name = Init_phm; cond hsr1 = 1, hsr0 = 0. au p := p_low + 0; chan neg_lsl, neg_mrl, neg_tdl; chan clear flag1. chan config := p, enable_mtsr; chan set flag0. au diob := 0; ram diob -> @ACCUM; end. (**********************************************************************) (* *) (* STATE : ACCUM_HIGH_PIN *) (* *) (* PRELOAD PARAMETER : LAST_TIME *) (* *) (* ENTER WHEN : a match when the pin is high. *) (* *) (* ACTION : *) (**********************************************************************) %entry ram p <- @LAST_TIME; start_address *; disable_match; name = accum_high_pin; cond hsr1 = 0,hsr0 = 0,m/tsr = 1,pin = 1,flag0 = 0. accum_high_pin : goto setup_timeout. au diob := ert; ram diob -> @LAST_TIME. (**********************************************************************) (* *) (* STATE : ACCUM_LOW_PIN *) (* *) (* PRELOAD PARAMETER : LAST_TIME *) (* *) (* ENTER WHEN : a h-l transition is detected or a match when the *) (* pin is low. *) (* ACTION : *) (**********************************************************************) %entry ram p <- @LAST_TIME; start_address *; disable_match; name = accum_low_pin; cond hsr1 = 0,hsr0 = 0,m/tsr = 1,pin = 0,flag0 = 0. check_seq1 : if hsq1 = 0 then goto setup_timeout. au diob := ert; ram diob -> @LAST_TIME. no_timeout : chan set flag0; chan pac := low_high; if TRUE then goto accum_time. setup_timeout : au a := p; ram p <- @PHM2. au ert := p_high + diob; chan clear flag0; chan neg_mrl, write_MER, pac := high_low. accum_time : au diob := diob - a; ram p <- @ACCUM. au diob := p + diob, ccl; ram diob -> @ACCUM. if MRL = 0 then goto incr_count. ram p <- @STRT_LNK_CH_PHM. if TDL = 0 then goto check_C. incr_count : au dec := p_high; ram p <- @TRANS_COUNT_PHM. (* CHANGES *) if C = 1 then goto overflow, flush. au p_low := p_low + 1; ram p -> @TRANS_COUNT_PHM. chan neg_tdl, neg_mrl. au p_low := p_high - p, ccl. if LOW_SAME = 0 then goto End_of_phase, flush. accum_done : au p_low := 0; ram p -> @TRANS_COUNT_PHM. au p := 0; ram p -> @ACCUM. if flag1 = 1 then goto End_of_phase. chan clear flag1; chan cir. ram diob -> @PHM1. check_seq0 : if hsq0 = 1 then goto call_link, flush. chan clear flag1; end. call_link : call Link_chan, flush;dec_return; ram p <- @STRT_LNK_CH_PHM. ram diob -> @PHM1; end. check_C : (* CHANGE *) if C = 0 then goto End_mrl, flush; chan clear flag0. overflow : au diob := 0; ram p <- @PHM2. (* CHANGE *) chan clear flag0; chan neg_mrl; au p_low := p_low + 1. goto check_seq0, flush; ram p -> @PHM2; chan set flag1. (**********************************************************************) (* *) (* STATE : HIGH_TIME_BEGIN *) (* *) (* PRELOAD PARAMETER : LAST_TIME *) (* *) (* ENTER WHEN : a h-l transition is detected *) (* *) (* ACTION : *) (**********************************************************************) %entry ram p <- @PHM2; start_address *; disable_match; name = high_time_begin; cond hsr1 = 0,hsr0 = 0,m/tsr = 1,pin = 1,flag0 = 1. update_time : if TDL = 0 then goto End_mrl, flush. au diob := ert; ram diob -> @LAST_TIME. start_timeout : au ert := p_high + diob; chan clear flag0; chan neg_tdl, write_MER, neg_mrl, pac := high_low; end. (**********************************************************************) (* *) (* STATE : FIRST_H_L *) (* *) (* PRELOAD PARAMETER : LAST_TIME *) (* *) (* ENTER WHEN : l-h transition *) (* *) (* ACTION : *) (**********************************************************************) %entry ram p <- @PHM2; start_address update_time; disable_match; name = first_h_l; cond hsr1 = 0,hsr0 = 0,m/tsr = 1,pin = 0,flag0 = 1. (**********************************************************************) (* *) (* PROCEDURE : End_mrl *) (* *) (* ACTION : *) (**********************************************************************) End_mrl : chan neg_mrl; end. (**********************************************************************) (* UNDEFINED ENTRIES - execute an end. *) (**********************************************************************) %entry ram p<-prm0; start_address End_of_Link; (* 4/1/93 MP *) name = phm_undef; cond hsr1 = 0,hsr0 = 0,m/tsr = 0,lsr =1. %entry ram p<-prm0; start_address End_of_phase; name = phm_undef; cond hsr0 = 1.