(**********************************************************************) (* *) (* Function: DCPM - DEGREE CLOCK with PERIOD MEASUREMENT *) (* *) (* Creation Date: 10/07/91 From: NEW *) (* *) (* Author: Mike Pauwels *) (* *) (* Description: *) (* ------------ *) (* Receives signals from a toothed wheel and inserts TCR2 counts at *) (* a selected modulus between the teeth. Also measures the period *) (* of the input tooth signal to 23 bits of TCR1. If the number of *) (* counts exceeds a selected stall number, a host interrupt is *) (* requested. *) (* *) (* Updates: By: Modification: *) (* -------- --- ------------- *) (* *) (* 01/31/92 MAP Change WRITE_TOOTH to prm2 for LINK *) (* 02/13/92 MAP Correct Tooth Overwrite *) (* 04/10/92 MAP Correct handling of PHASE bit *) (* 04/27/92 MAP Force Immediate Match on Initialization *) (* Correct REFERENCE_TIME overwrite in State_5 *) (* 11/Apr/93 JL Converted to new syntax. *) (* *) (*--------------------------------------------------------------------*) (* Standard Exits Used:- End_Of_Phase: Yes End_Of_Link: No *) (* *) (* External Files included: NONE *) (* *) (* CODE SIZE excluding standard exits = 79 LONG WORDS *) (*--------------------------------------------------------------------*) (* *) (* *) (********** This Revision: REV 1.5 *********) (* *) (********** LAST MODIFIED: 11/Apr/93 BY: Jeff Loeliger *********) (***************************************************************************) (*Motorola reserves the right to make changes without further notice to any*) (*product herein. Motorola makes no warranty, representation or guarantee *) (*regarding the suitability of its products for any particular purpose, nor*) (*does Motorola assume any liability arising out of the application or use *) (*of any product or circuit, and specifically disclaims any and all *) (*liability, including without limitation consequential or incidental *) (*damages. "Typical" parameters can and do vary in different applications. *) (*All operating parameters, including "Typical",must be validated for each *) (*customer application by customer's technical experts. Motorola does not *) (*convey any license under its patent rights nor the rights of others. *) (*Motorola products are not designed, intended, or authorized for use as *) (*components in systems intended for surgical implant into the body, or *) (*other applications intended to support or sustain life, or for any other *) (*application in which the failure of the Motorola product could create a *) (*situation where injury or death may occur. Should Buyer purchase or use *) (*Motorola products for any such unintended or unauthorized application, *) (*Buyer, shall indemnify and hold Motorola and its officers, employees, *) (*subsidiaries, affiliates, and distributors harmless against all claims, *) (*costs, damages, and expenses, and reasonable attorney fees arising out *) (*of, directly or indirectly, any claim of personal injury or death *) (*associated with such unintended or unauthorized use, even if such claim *) (*alleges that Motorola was negligent regarding the design or manufacture *) (*of the part. *) (*Motorola and the Motorola logo are registered trademarks of Motorola Inc.*) (*Motorola is an Equal Opportunity/Affirmative Action Employer. *) (*Copyright Motorola Inc. 1993 *) (***************************************************************************) (* *) (* *) (* *) (* HSQ1 HSQ0 Action *) (* ---- ---- ------ *) (* x 0 Single Phase Mode *) (* x 1 Two-Phase Mode *) (* *) (* Links Accepted: YES Links Generated: NO *) (* *) (* Interrupts Generated After: Init HSR complete. *) (* Link service complete . *) (* Match sequence complete. - no IRQ *) (* in continuous mode. *) (* *) (*()()()()()()()()()()()()()()()()()()()()()()()()()()()()()()()()()()*) (* *) (*DATA STRUCTURE *) (* *) (* NOTE: MUST BE USED ON CH 14 or 15. *) (* *) (* PARM name BY DESCRIPTION *) (* *) (* 0 CONFIG_DCPM CPU Selects Rising/Falling Tooth edge *) (* 0 REF_TIME_DCPM TPU Temporary TCR1 value *) %macro REF_TIME_DCPM 'prm0'. %macro CONFIG_DCPM 'prm0'. (* *) (* 1H TOOTH_DCPM TPU Tooth Count *) (* 1H LINK_TOOTH_DCPM TPU Force value for TOOTH from LINK *) (* (1/31/92 MAP) *) (* 1L DEGREE_DCPM TPU Degree Count between Teeth *) %macro TOOTH_DCPM 'prm1'. %macro DEGREE_DCPM 'prm1'. %macro LINK_TOOTH_DCPM 'prm1'. (* *) (* 2H MODULUS_DCPM CPU TCR2 Counts per tooth *) (* 2L STALL_COUNT_DCPM CPU DEGREE Count for Interrupt *) %macro MODULUS_DCPM 'prm2'. %macro STALL_COUNT_DCPM 'prm2'. (* *) (* 3H NUMBER_TEETH_DCPM CPU Teeth per cycle *) (* 3L RATIO_DCPM CPU Period Multiplier *) (* Note: Degree Period = PERIOD * RATIO / 1024 *) %macro NUMBER_TEETH_DCPM 'prm3'. %macro RATIO_DCPM 'prm3'. (* *) (* 4L PERIOD_MSB_DCPM TPU Tooth period MS byte *) %macro PERIOD_MSB_DCPM 'prm4'. (* *) (* 5 PERIOD_LSW_DCPM TPU Least significant word *) %macro PERIOD_LSW_DCPM 'prm5'. (* *) (* 6 INTERPOLATE_DCPM TPU Time Between Degrees *) %macro INTERPOLATE_DCPM 'prm6'. (* *) (* 7MSb PHASE_DCPM TPU Phase of TCR2 (1/31/92 MAP) *) (* 7L WRITE_TOOTH_DCPM CPU Force Value for TOOTH and TCR2 *) %macro PHASE_DCPM 'prm7'. %macro WRITE_TOOTH_DCPM 'prm7'. (* *) (*hsq0 TWO_PHASE_DCPM Indicates two-phase sequence *) %macro TWO_PHASE_DCPM 'hsq0'. (* *) (*HSR11 INIT_DCPM Initialize *) (* *) (*HSR10 SET_DCPM Write TOOTH and Start Fill *) (* *) (*flag0 SYNC_DCPM set when Tooth Count synced *) %macro SYNC_DCPM 'flag0'. (* *) (*FLAG1 FIRST_TOOTH_DCPM set after first tooth detected *) %macro FIRST_TOOTH_DCPM 'flag1'. (* *) (*LINK LINK_SET_DCPM Write TOOTH and Start Fill *) (* *) (*No LINK Generated *) (* *) (*IRQ Interrupt on every Tooth until Syncronization and on STALL *) (* *) (* *) (**********************************************************************) (*||||||||||||||||||||| MICROCODE STARTS BELOW |||||||||||||||||||||*) (**********************************************************************) (* *) (* ENTRY name: Init_DCPM *) (* *) (* STATE(S) ENTERED: 1 *) (* *) (* PRELOAD PARAMETER : INTERPOLATE_DCPM *) (* *) (* ENTER WHEN : HSR11 Issued by Host *) (* *) (* ACTION : *) (* 1.Configure channel *) (* 2.Test INTERPOLATE and limit *) (* 3.Setup for first match *) (* 4.Clear flag0 until synchronization is received *) (* *) (**********************************************************************) %entry start_address *; ram diob <-@INTERPOLATE_DCPM;disable_match; name = Init_DCPM; cond hsr1=1,hsr0=1. (*State_1: *) (* Configure Channel by CONFIG . *) (* If INTERPOLATE <= 0 then *) (* INTERPOLATE = $8000. *) (* Clear SYNC . *) (* Clear FIRST_TOOTH . *) (* TCR2 = $FF00. *) (* TOOTH = 0. *) (* DEGREE = 0. *) (* Enable Transitions. *) (* Force Immediate Match to disable Matches 4/27 MP *) (* End. *) State_1_DCPM: diob := diob, ccl; ram p<-@CONFIG_DCPM. Config := p; enable_mtsr; chan clear @SYNC_DCPM; If Low_Same = 0 then Goto Interpolat_Ok_DCPM. au p := 0; ram p -> @TOOTH_DCPM. diob := max; ram diob -> @INTERPOLATE_DCPM. Interpolat_OK_DCPM: au ert := tcr1. (* causes immediate match 4/27 MP*) au p_high := p_high - 1; chan clear @FIRST_TOOTH_DCPM. au tcr2 := p; neg_mrl; (* clears mrl from immediate match #4/27 MP*) end. (**********************************************************************) (* *) (* ENTRY name: Normal Transition or Match after Sync *) (* *) (* STATE(S) ENTERED: 3 & 5 *) (* *) (* PRELOAD PARAMETER : INTERPOLATE_DCPM *) (* *) (* ENTER WHEN : Transition or Match Occurs after Synchronization *) (* *) (* ACTION : *) (* 1.If Not Match then do State_5 *) (* 2.Increment Degree Clock *) (* 3.If DEGREE < MODULUS then Increment TCR2 *) (* 4.If DEGREE > STALL then Interrupt *) (* 5.Setup for Match on Capture_Register + INTERPOLATE *) (* *) (**********************************************************************) (*STATE 3 Match. *) (* *) (*Enter when a Match occurs. was disable_match 4/27/92 MP *) %entry ram diob <- @INTERPOLATE_DCPM; start_address *; enable_match; name = Match_DCPM; cond hsr1 = 0,hsr0 = 0,m/tsr = 1,lsr = 0,flag0 = 1. (* Enter if flag0 = 1, else need not increment TCR2 *) (* If MRL = 0 then goto State_5. *) (* *) (*State_3: *) (* REF_TIME = Capture_Reg. *) (* Match_Reg = Capture_Reg + INTERPOLATE. *) (* DEGREE = DEGREE + 1. *) (* If DEGREE < MODULUS then *) (* TCR2 = TCR2 + 1. *) (* else *) (* IF DEGREE >= STALL_COUNT then *) (* Interrupt_Request. *) (* End. *) (* Preload p <- @INTERPOLATE *) State_3_DCPM: If MRL = 0 then Goto State_5_DCPM, flush. (* Add flush 4/27 MP*) au p := ert; ram p -> @REF_TIME_DCPM. au ert := ert + diob; ram diob <- @DEGREE_DCPM. au p := diob + 1; ram p -> @DEGREE_DCPM. diob := p_low; ram p <- @MODULUS_DCPM. au p_high := p_high - diob, ccl. if Low_Same = 1 then goto Decel_Period_DCPM. (* was N = 1 4/27 MP*) p_low := p_low - diob, ccl. (* P_Low = STALL_COUNT *) tcr2 := tcr2 + 1; Write_mer; neg_mrl; end. Decel_Period_DCPM: if low_same = 0 then goto Stall_DCPM, flush. No_Stall_DCPM: Write_mer; neg_mrl; end. Stall_DCPM: chan cir; Write_mer; Neg_mrl; end. (**********************************************************************) (* *) (* ENTRY name: First_Transition *) (* *) (* STATE(S) ENTERED: 2, 3, & 4 *) (* *) (* PRELOAD PARAMETER : INTERPOLATE_DCPM *) (* *) (* ENTER WHEN : Transition or Match Occurs before Synchronization *) (* *) (* ACTION : *) (* 1.If Match then do State 3. *) (* 2.If FIRST_TOOTH_DCPM is set then do State 4 *) (* 3.State 2: *) (* 3a. set FIRST_TOOTH_DCPM *) (* 3b. REF_TIME_DCPM = Capture_Register *) (* 3c. Match on Capture_Register + INTERPOLATE *) (* *) (**********************************************************************) (*STATE 2 First Transition *) %entry ram diob <- @INTERPOLATE_DCPM; start_address *; disable_match; name = First_Transition; cond hsr0 = 0,hsr1 = 0,m/tsr = 1,lsr = 0,pin = x,flag0 = 0. (*Enter when selected Transition occurs and FIRST_TOOTH = 0. *) If MRL = 1 then Goto State_3_DCPM, flush; enable_mtsr. If @FIRST_TOOTH_DCPM = 1 then Goto State_4_DCPM, flush; chan set @FIRST_TOOTH_DCPM. (* REF_TIME = Capture_Reg. *) (* set FIRST_TOOTH. *) (* Match on Capture_Reg + INTERPOLATE. *) (* Enable Matches. *) (* End. *) State_2_DCPM: au p := ert; ram p -> @REF_TIME_DCPM. au ert := ert + diob; Write_mer, neg_tdl, neg_mrl; end. (**********************************************************************) (* *) (* ENTRY name: Subsequent Transitions, Sync not set *) (* *) (* STATE(S) ENTERED: 4 *) (* *) (* PRELOAD PARAMETER : INTERPOLATE_DCPM *) (* *) (* ENTER WHEN : Transition or Match Occurs before Synchronization *) (* *) (* ACTION : *) (* 1.If Match then do State 3. *) (* 2.If FIRST_TOOTH_DCPM is set then do State 4 *) (* 3.State 2: *) (* 3a. set FIRST_TOOTH_DCPM *) (* 3b. REF_TIME_DCPM = Capture_Register *) (* 3c. Match on Capture_Register + INTERPOLATE *) (* *) (**********************************************************************) (* STATE 4 Subsequent Transitions, Sync not set *) (* *) (*Enter when Transition occurs and FIRST_TOOTH_DCPM is set. *) (* *) (*State_4: SYNC_DCPM clear *) (* If SYNC_DCPM = 1 then Goto State_5. *) (* TOOTH := TOOTH + 1. *) (* Temp_TCR2 = $FF00. *) (* Goto Common_4_5. *) (* *) State_4_DCPM: ram p <- @TOOTH_DCPM. (* 1/31/92 MAP *) au p_high := p_high + 1; (* #2/13/92 MAP *) ram p -> @TOOTH_DCPM. (* 1/31/92 MAP *) au p_high := -1. Goto Common_4_5_DCPM. au a := p. (* a is Temp_TCR2 4/10/92 MP *) (* *) (*STATE 5 Subsequent Transitions, Sync set. *) (* *) (*State_5: SYNC_DCPM set. *) (* *) (* TOOTH_DCPM = TOOTH_DCPM + 1. *) (* If TOOTH_DCPM = NUMBER_TEETH_DCPM then *) (* TOOTH_DCPM = 0. *) (* If TWO_PHASE_DCPM = 1 then *) (* PHASE_DCPM += $8000. *) (* Temp_TCR2 = TOOTH_DCPM * MODULUS_DCPM + PHASE_DCPM. *) State_5_DCPM: (* Enter with diob = INTERPOLATE *) ram p <- @NUMBER_TEETH_DCPM. au a := p_high; ram p <- @TOOTH_DCPM. au p_high := p_high + 1; ram p -> @TOOTH_DCPM. au nil := p_high - a; ccl; (* Is TOOTH >= NUMBER_TEETH? *) ram p <- @MODULUS_DCPM. If N = 1 then Goto Make_TCR2_DCPM. au sr := p_high; ram p <- @TOOTH_DCPM. (* MODULUS in sr *) If @TWO_PHASE_DCPM = 0 then Goto Make_TCR2_DCPM. au p_high := 0, ccl; (* Default N #4/10/92 MP *) ram p -> @TOOTH_DCPM. (* Reset TOOTH *) ram p <- @PHASE_DCPM. au p := p + max,ccl; (* N has PHASE #4/10/92 MP *) ram p -> @PHASE_DCPM. Make_TCR2_DCPM: ram p <- @TOOTH_DCPM; au a := 0. ram diob <- @PHASE_DCPM; (* added 4/27/92 MP *) au p_low := 0. au dec := #7. au a :=>> a + p, shift; repeat. (* Multiply TOOTH * MODULUS *) au diob := diob, ccl. (* added 4/27/92 MP *) If N = 0 then Goto Common_4_5_DCPM, flush. au a := a + max. (* chan set Phase 4/10/92 MP *) (* *) (*Common_4_5: *) (* TCR2 = Temp_TCR2. TCR2 is now corrected *) (* Period_Temp = DEGREE_DCPM * INTERPOLATE_DCPM. *) (* Period_Temp = Period_Temp + Capture_Reg - REF_TIME_DCPM. *) (* PERIOD_MSB:PERIOD_LSW = Period_Temp. PERIOD is now valid *) (* INTERPOLATE_DCPM = Period_Temp * RATIO_DCPM / 1024. *) (* Match_Reg = Capture_Reg + INTERPOLATE_DCPM. First Degree is set *) (* DEGREE_DCPM = 0. *) (* *) (* End. *) Common_4_5_DCPM: (* a = Temp_TCR2; diob = INTERPOLATE *) au TCR2 := a; (* a was sr #4/10/92 MP *) ram p <- @DEGREE_DCPM. au sr := p_low; ram diob <- @INTERPOLATE_DCPM. (* need to reload 4/27/92 MP *) au p_low := 0; ram p -> @DEGREE_DCPM. ram p <- @REF_TIME_DCPM. au a := 0. au dec := #15. (* Multiply DEGREE * INTERPOLATE *) au a :=>> a + diob, shift; repeat. au p := ert - p. au sr := sr + p, ccl. If C = 0 then Goto Write_Period_DCPM, flush. a := a + 1. Write_Period_DCPM: (* Does a coherrent write of Period to ram *) au diob := a; ram diob -> @PERIOD_MSB_DCPM. au diob := sr; ram diob -> @PERIOD_LSW_DCPM. Calculate_INTERPOLATE_DCPM: (* NOTE: The following calculation assumes that Period < 262144. If Period exceeds 262143, it is limited. *) au a :=>> a, shift. au a :=>> a, shift, ccl. (* Divide by 4 *) If Z = 1 then Goto Scale_DCPM. au dec := #7. au a := 0. au sr := -1. Scale_DCPM: au diob := sr; ram p <- @RATIO_DCPM. au sr := p_low. (* RATIO is 8 bits *) (* MULTIPLY Period/4 * Ratio *) au a :=>> a + diob, shift; repeat. au diob := a; (* Divide by #256 *) ram diob -> @INTERPOLATE_DCPM. au p := ert; ram p -> @REF_TIME_DCPM. au ert := ert + diob; Write_mer; neg_mrl; neg_tdl; end. (**********************************************************************) (* *) (* ENTRY name: Synchronize by Link or HSR10 *) (* *) (* STATE(S) ENTERED: 6 *) (* *) (* PRELOAD PARAMETER : WRITE_TOOTH_DCPM *) (* *) (* ENTER WHEN : Link or HSR10 is issued with TCR2 value in WRITE_TOOTH*) (* *) (* ACTION : *) (* 1.If Not FIRST_TOOTH, then do nothing. *) (* 2.Else TOOTH = WRITE_TOOTH *) (* set SYNC. *) (* *) (**********************************************************************) (*STATE 6 Synchronization *) %entry ram diob <- @WRITE_TOOTH_DCPM; start_address *; disable_match; name = Syncronize_DCPM; cond hsr1 = 1,hsr0 = 0. chan set @SYNC_DCPM; ram p <- @TOOTH_DCPM. (* 1/31/92 MAP *) au p_high := diob; (* 1/31/92 MAP *) ram p -> @TOOTH_DCPM; (* 1/31/92 MAP *) end. %entry ram p <- @LINK_TOOTH_DCPM; start_address *; disable_match; name = Syncronize_DCPM; cond hsr0 = 0,hsr1 = 0,m/tsr = x,lsr = 1,pin = x,flag0 = x. chan set @SYNC_DCPM; (* 1/31/92 MAP *) neg_lsl; end. (**********************************************************************) (* UNUSED ENTRIES - execute appropriate termination *) (**********************************************************************) %entry start_address end_of_phase; name = Unused_DCPM; cond hsr1 = 0,hsr0 = 1.